Associate Professor, Department of Electrical Engineering
Analog, RF, and mm-Wave Integrated Circuits
226, ACES Building
Department of Electrical Engineering (ACES building)
Indian Institute of Technology Kanpur- 208016
UP. India
Ph.D. in Electrical Engineering from IIT Delhi, 2014
M.Tech. in VLSI Design Tools and Technologies (VDTT) from IIT Delhi, 2009
B.Tech. in ECE from JNTU, Hyderabad, 2007
P. K. Sharma and N. Nallam, "Breaking the Performance Tradeoffs in N-Path Mixer-First Receivers Using a Second- Order Baseband Noise-Canceling TIA," in IEEE Journal of Solid-State Circuits, vol. 55, no. 11, pp. 3009-3023, Nov. 2020, doi: 10.1109/JSSC.2020.3005776.
K. Badiyari and N. Nallam, "Exploiting MOS Parametric Amplification to Suppress Noise in Switched-Capacitor RF Receivers," in IEEE Transactions on Microwave Theory and Techniques, vol. 68, no. 12, pp. 5347-5358, Dec. 2020, doi: 10.1109/TMTT.2020.3017752.
G. D. Singh and N. Nallam, "An RF Choke-Less Class E Power Amplifier," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 67, no. 11, pp. 2422-2426, Nov. 2020, doi: 10.1109/TCSII.2020.2966552.
K. Badiyari, N. Nallam and S. Chatterjee, "An N-Path Band-Pass Filter With Parametric Gain-Boosting," in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 66, no. 10, pp. 3700-3712, Oct. 2019, doi: 10.1109/TCSI.2019.2918699.
P. K. Sharma and N. Nallam, "A 0.1-0.95 GHz Full-Duplex Receiver With < 1 dB NF Degradation Using a Passive Continuous-Mode Charge-Sharing Vector Modulator," in IEEE Transactions on Microwave Theory and Techniques, vol. 67, no. 7, pp. 3042-3052, July 2019, doi: 10.1109/TMTT.2019.2900612.
Principal RFIC/Analog Design Engineer, Hanwha Phasor Ltd., UK (2023-25)
Staff Engineer, Qualcomm, Bangalore (2021-23)
Assistant Professor, IIT Guwahati (2014-2021)
Sr. R&D Engineer, Synopsys, Hyderabad (2013-14)