|
Advertisement Number: P.Rect./R&D/2026/012
Established in 1959, IIT Kanpur is one of the most prestigious institutes in the country. With the best research infrastructure and state-of-the-art facilities, it encourages students to innovate using technology and approach education with a problem-solving attitude. It was set up with a vision to create, disseminate and translate knowledge in science, engineering, and allied disciplines that will best serve the society; and the recognition that the Institute has garnered as a major center of learning in Engineering, Science, and several Inter-disciplinary Areas is a testament to the success of this vision.
Project Overview:
Lead the technical execution of a strategic project at IIT Kanpur to build a production-grade compiler targeting an advanced RISC-V based DSP and AI compute architecture with SIMD vector acceleration. Drive cross-functional teams responsible for frontend and backend compiler development, debugging infrastructure, and performance optimization
|
(a)
|
Position
|
Senior Project Engineer
|
|
(b)
|
No. of positions
|
02
|
|
(c)
|
Location
|
IIT Kanpur
|
|
(d)
|
Eligibility
|
- Strong technical understanding of compiler technologies and DSP architectures.
- Proven track record in agile project management, team leadership, and cross-functional collaboration.
- Excellent communication, negotiation, and stakeholder management skills.
- Experience with project management tools and methodologies.
|
|
(e)
|
Desired qualification
|
- Master’s or PhD in Computer Science, Electrical Engineering, or related technical discipline.
|
|
(f)
|
Experience
|
- Minimum 4 years’ experience managing complex software projects in compiler development, embedded systems, or signal processing.
|
|
(g)
|
Desired Skills
|
- Familiarity with RISC-V ISA and SIMD/vector processors.
- Hands-on experience or strong understanding of LLVM or similar compiler frameworks.
- Background in embedded software or hardware-software co-design environments.
|
|
(h)
|
Consolidated Salary range
|
Rs. 38,800 to 96,400 /-
|
|
(i)
|
Working hours
|
9.30 am - 6.00 pm
|
|
(j)
|
Roles and Responsibilities
|
- Plan, lead, and manage all phases of the compiler development lifecycle including scheduling, budgeting, and resource allocation.
- Coordinate multidisciplinary teams including compiler engineers, DSP and AI kernel developers, QA, and infrastructure specialists.
- Facilitate technical decisions, risk mitigation, and stakeholder communication.
- Collaborate with hardware design teams and external research organizations.
- Ensure consistent application of software engineering best practices, testing, and quality assurance procedures.
- Report on project status to senior management and sponsors.
|
|
(k)
|
Appointment
|
Initially for a period of 01 year, extendable yearly as per the project duration
|
|
(l)
|
Application Process
|
|
|
(m)
|
Last date of receipt of application
|
Jan 28, 2026 (Tentative)
|
No hard copies of applications will be accepted.
Note: The institute reserves the right to fix suitable criteria for short listing of eligible candidates satisfying qualification and experience. Only shortlisted candidates will be called for the test/interview. No TA/DA will be paid for attending the test/interview.
Dr Amey Karkare Professor,
Dept. of CSE, IIT Kanpur
|