Instruction Enhancement Program
- IEP1 Course on Digital IC Design. July 03 - 14, 2006
- IEP2 Course on Synthesis of Digital Systems. December 10 - 27, 2007
- IEP3 Course on Low Power Digital Design. September 24 - 28, 2012
The India Chip is to promote ASIC design activity at other engineering colleges in the country. The digital designs from five different institutions have been integrated together at IIT Kanpur on a single chip. Read more ..